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存储器大小端 |
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文档内容介绍:
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文档名称 :Big and Little Endian
Byte Addressing |
文档格式 :pdf |
发 布 者 :ARM™ |
语 言 :英文 |
更新日期 :2006-12-26 |
本文档共12页。 |
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内容简介 :
Introduction
The term endianness refers to the way in which multiple elements
of identical size are stored in memory. There are two conventions
for storing bytes within multi-byte quantities, such as 32-bit
words, in byte-addressed memory. In a little-endian architecture,
the least significant byte of the quantity is stored at the
lowest memory address in the range of addresses used to store
the quantity. The reverse is true in a big-endian architecture,
where the most significant byte is stored at the lowest address.
The ARM can be configured to be either little- or big-endian.
This Application Note discusses the effect that choosing either
little- or big-endian configuration has on byte and halfword
addressing.
For more information on endianness, please see:
- Computer Architecture - A Quantitive Approach, Henessey
& Patterson, page 73, 2nd Ed, Publisher: Morgan Kaufman,
ISBN: 1-55860-32908.
- ARM System Architecture, Steve Furber, page 110, 1st Ed,
Publisher:
Addison-Wesley, ISBN 0-201-40352-8.
Note The basic endian configuration principles
described in this application note are applicable to all ARM
cores and AMBA-based systems. However, the signal names used
are specific to ARM7TDMI. For equivalent signal names for other
ARM cores, or AMBA-based systems, please refer to the appropriate
datasheet.
Table of Contents
- Introduction
- Configuring the Endianness of the ARM
- Effect of Endian Configuration on the System
3.1 Connection to memory
3.2 Word accesses to memory
3.3 Byte and halfword accesses to memory
- Little-Endian Operation
4.1 Connection to memory
4.2 Word accesses to memory
4.3 Byte and halfword accesses to memory
- Big-Endian Operation
5.1 Connection to memory
5.2 Word accesses to memory
5.3 Byte and halfword accesses to memory.
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